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Chapter 14: AltLab Library
Table 14–7 on page 14–7 lists the megafunctions and LPM functions that are not
supported.
Table 14–7. Unsupported Megafunctions and LPM Functions
14–7
Megafunctions
LPM Functions
alt3pram
altcam
altcdr
altclklock
altddio
altdpram
altera_mf_common
altfp_mult
altlvds
altmemmult
altmult_accum
altpll
altqpram
altsqrt
alt_exc_dpram
alt_exc_upcore
dcfifo
lpm_and
lpm_bustri
lpm_clshift
lpm_constant
lpm_decode
lpm_divide
lpm_ff
lpm_fifo
lpm_fifo_dc
lpm_inv
lpm_latch
lpm_or
lpm_pad
lpm_ram_dq
lpm_ram_io
lpm_rom
lpm_shiftreg
lpm_xor
HDL Input
Connect the HDL Input block directly to an input node in a subsystem. Use with the
Subsystem Builder and HDL Entity blocks for black-box simulation.
The type and bit width must match the type and bit width on the corresponding input
port in the HDL file referenced by the HDL Entity block. HDL Input blocks are
automatically generated by the Subsystem Builder block.
You can optionally specify the external Simulink type. If set to Simulink Fixed Point
Type, the bit width is the same as the input. If set to Double , the width may be
truncated if the bit width is greater than 52.
Table 14–8 shows the HDL Input block parameters.
.
Table 14–8. HDL Input Block Parameters
Name
Bus Type
[number of bits].[]
[].[number of bits]
Value
Signed Integer,
Signed Fractional,
Unsigned Integer,
Single Bit
>= 0
(Parameterizable)
>= 0
(Parameterizable)
Inferred,
Description
The number format of the bus.
Specify the number of bits to the left of the binary point, including the
sign bit. This parameter does not apply to single-bit buses.
Specify the number of bits to the right of the binary point. This parameter
applies only to signed fractional buses.
Specifies whether the external type is inferred from the Simulink block it
External Type
Simulink Fixed Point Type, is connected to or explicitly set to either Simulink Fixed Point or Double
Double
type. The default is Inferred.
November 2013
Altera Corporation
DSP Builder Handbook
Volume 2: DSP Builder Standard Blockset
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